fractional error

In addition, fractional frequency divider has greatly reduced error in baud rate.

另外，采用小数分频等技术极大地降低了串口的波特率误差。

A new numerical method for the fractional integral that only stores part history data is presented, and its discretization error is estimated.

提出了一种只需要存储部分历史数据的分数积分的数值计算方法，并给出了误差估计。

bisuan multiplication, division of fractional error rate is high among the calculation process;

小数笔算乘、除法的中间计算过程错误率很高；

This study is about the key technologies of using FPGA to implement digital delay, related to the coefficient processing and error analysis, distributed algorithm and pipeline technology. Then the fractional delay filter is implemented by means of FPGA IP core.

包括利用FPGA实现数字延时的关键技术，涉及到对系数的处理和误差分析，分布式算法和流水线技术，并以FPGA的IP核的方式实现了分数延时滤波器。